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SFN Looks to end Far East chip monopoly with Time Machine

SFN Looks to end Far East chip monopoly with Time Machine

Super User Press 29 September 2022
SFN https://www.searchforthenext.com is a UK company that has invented a new wafer process called Bizen®, which is used to build Zpolar transistors with Zpolar® Tunnel Logic (ZTL). The transistors are much smaller, require less semiconductor layers and are higher performing than those built using CMOS. Therefore they can be built much faster and cheaper using existing equipment (steppers etc). The advantages are so great that ZTL chips with the performance of those built using 35nm CMOS can be fabricated at facilities equipped with 180nm equipment. This means that older generation 180nm fabs - such as NWF, the UK's largest semiconductor fab which is at the centre of a political row concerning its sale to Chinese-owned Nexperia - could be used to build ZTL chips with the performance of 35nm CMOS ICs, for use in high performance applications such as 5G/AI etc. Today, SFN will unveil four ITMs – effectively process nodes - which fabs can use to build the new Zpolar transistors.If employed, this would massively address the IC shortage…and also protect the IP of chip designers, while reducing the world's reliance on the near-monopoly of TSMC. More https://www.searchforthenext.com
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PRESS 2022 ITM & ZPOLAR LAUNCH Wall(s)
PRESS 2019 BIZEN LAUNCH Wall(s)
ELECTRONICS MEDIA
uk collaboration unveils bizen a transistor wafer process technology
ELECTRONIC PRODUCT DESIGN
Reduce chip production times 10-fold & increase net profit 40-50 times
HACKADAY
The Bizen Transistor
TECHWORKS
ITM enables fabs to reduce semiconductor production times 10 fold and increase net profit 40-50 times
EENEWS
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BUSINESS WIRE
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ELECTRONICS WORLD
Fabs can now reduce semiconductor production times ten-fold and significantly increase their profits
SNEWSI USA
Infrastructure Time Machine
ELECTRONICS SPECIFIER
Plugging the leak
BIT-TECH
UK startup teases CMOS-beating Bizen chip fab tech
EE TIMES EUROPE
New Transistor Design Aims to Boost Business for UK Fabs
EE TIMES
Bipolar-Zener Combo Takes On CMOS
NMI
SFN looks to end monopoly of Taiwanese and Korean chip producers with ‘Infrastructure Time Machine’
EPDT
Disruptive new wafer process technology to slash lead time winding back Moores Law
ELEKTRONIK PRAXIS GERMANY
Bizen is bigger than Brexit
IXBT RUSSIA
The UK has developed a process technology that is much better than CMOS
EENEWS EUROPE
UK start-up process looks for fab partners
ELECTRONICS WEEKLY
Zpolar logic aims to beat CMOS, on 10 year older fabs
EET ASIA
The Combination of Bipolar-Zener Takes on CMOS
THE AI JOURNAL
SFN Enables Fabs to Reduce Semiconductor Production Times 10 Fold and Increase Net Profit 40-50 Times
NEW ELECTRONICS
SFN looks to end monopoly of Taiwanese and Korean chip producers
BCBITI UKRAINE
The UK has developed a manufacturing process that is much better than CMOS
ELECTRONICS WEEKLY
Tunnelling transistor offers logic power easy IC
ELECTRONICS ERA
Bizen wafer process used to build Zpolar Transistors with Zpolar Tunnel Logic (ZTL); Ends monopoly of Taiwanese and Korean chip producers; Addresses semiconductor shortage crisis
TIMESTECH INDIA
SFN New Machine Enables Fabs to Reduce Production Time
ELECTRONIC SPECIFIER
SFN's ‘Infrastructure Time Machine’ for chip designs
SILICON UK
Search For The Next: UK Collaboration Unveils Bizen® a Transistor Wafer Process Technology Promising to Slash Lead Times, Wafer Area and Process Layers While Increasing Speed, Reducing Power and Increasing Gate Density Over CMOS
01NET
French publication - Extension of Moore's Law: The Incredible Promises of the Bizen Transistor
DEFINING ELECTRONICS
SFN launches ‘Infrastructure Time Machine’ that enables fabs to reduce semiconductor production times 10 fold and increase net profit 40-50 times
ELECTRONICS MAKER
SFN launches ‘Infrastructure Time Machine’ that enables fabs to reduce semiconductor production times 10 fold and increase net profit 40-50 times
TECHWORKS NMI
Bizen - UK Collaboration presents an exciting new wafer process
ELECTRONICS MEDIA
SFN launches ‘Infrastructure Time Machine’ that enables fabs to reduce semiconductor production times 10 fold and increase net profit 40-50 times
YAHOO FINANCE
Search For The Next: UK Collaboration Unveils Bizen® a Transistor Wafer Process Technology Promising to Slash Lead Times, Wafer Area and Process Layers While Increasing Speed, Reducing Power and Increasing Gate Density Over CMOS
NTDHOY SPANISH
Thanks to the new process technology for transistor wafers Bizen uses the tunnel effect of quantum mechanics to allow complex ICs to be produced in “previous generations” plants.
DESIGN & ELEKTRONIK
Is a new type of bipolar taking CMOS from throne?
SILICON TECHNOLOGY POWERING BUSINESS
Fabs to Reduce Semiconductor Production Times 10 Fold and Increase Net Profit 40-50 Times

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